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Introduction to FPGA and Verilog

Introduction to applications and architecture of FPGA 

Introduction to Verilog HDL 

Design simulation, synthesis and implementation

Defining timing and area constaraints and timing Analyses

Working with IP Cores

Introduction to embedded design (MicroBlaze Soft Processor Core)



پیش نیازها: 

Digital Design

سیاست نمره دهی: 
Homeworks           :  1 point 

Quiz                     :  2 points 

Project or Seminar  :  3 Points

Midterm Exam          :   6 Points

Final Exam                :   8 Points         

زمان بندی کلاس: 

3 sessions / week

1 hour / session

Winter 2013

تحت نظارت وف بومی

Introduction to FPGA and Verilog | صفحه شخصی احسان یزدیان


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تحت نظارت وف بومی